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The CPU DSP56

The DSP has a 24-bit data bus with 3$\times$64KW memory zones: one for the programs (P) and two for the data (X and Y).

The interface between the CPU and the VME is made by means of a VIC068 (Cypress).

The DSP has a RS232 port and a Host 8-bit parallel port. The Host Port is directly interfaced to VME through memory mapping. It consists of two banks of registers: one bank accessible to the host computer and a second bank accessible to the DSP CPU. All the registers are 8-bits wide.

The acquisition program for the DSP is written in macro-assembly 56000. It allows the readout with pedestal suppression. The peak and the width of each pedestal distribution have to be previously determined and loaded in memory. Only channels having an amplitude greater than the specified values are stored into the DSP memory.

The acquisition program can be loaded through the RS232 port. Users can interact with the DSP by means of a monitor program (DSPbug) [8].


next up previous
Next: Event Transfer Up: Data Acquisition Previous: Data Acquisition
Alessandro Braghieri
2001-04-10